The research of Hans Jürgen Mattausch is focused on the basic design of functional memories and their application to intelligent information-processing systems.
Area-efficient N-port memories with large access bandwidth
Hierarchical 16 port SRAM, designed in 90nm CMOS technology, which realizes 590 Gbps random access bandwidth.
N-port memories with simultaneous read/write access from all ports offer large latency-free access-bandwidth even at low clock frequencies. We are therefore developing new N-port-memory architectures, which offer an optimum trade-off between the opposing requirements of (i) small area-consumption for each of the N ports and (ii) low access-conflict probability. The area-efficient N-port memories with large access bandwidth will be used as basic building blocks for memory-based, flexible systems with humanlike capabilities. Since nanometer-scale design rules are a challenge for the memory reliability, we are also investigating the influence of the fabrication variations on memory reliability.
Associative memories with fast nearest-match capability
Associative memory with nearest Euclidean-distance search capability, designed in 350nm CMOS technology, which has an equivalent performance of 140 GOPS.
An important basic component for intelligent data processing is an associative memory with nearest-match capability between input-data words and a stored basis of reference-data words. Especially for real-time recognition and learning it will be necessary to implement fast pattern matching up to large absolute minimum distances. We therefore aim at integrating the complete matching function in an area-efficient way into the memory, where the reference-data words are stored. Various new concepts for realizing the pattern-matching function, utilizing mixed analog-digital circuitry or mapping of the distance into time domain, are investigated. Additionally, concepts for building complete intelligent systems by including a learning function into the associative-memory architecture are also studied.
